Intel Custom Foundry-Synopsys Collaboration

Leading at the Edge of Moore’s Law

Intel® has long been known as the champion of Moore’s law, the engine of innovation in silicon manufacturing that is at the heart of modern technology. Through the Intel Custom Foundry, customers can harness Moore’s Law in their own products. They can leverage the process development leadership, manufacturing prowess, and packaging resources of the world's largest semiconductor company to benefit their products. Synopsys and Intel Custom Foundry have collaborated to provide intellectual properties (IP) and design flows for Intel 10-nanometer (nm), 14-nm and 22-nm tri-gate process technology for use by our mutual customers. 

Proven Design Flows at 14-nm and 10-nm

The Intel Custom Foundry 14-nm design platform supports Synopsys' industry-leading Synopsys Design Platform tools and RTL-to-GDSII methodology. Intel and Synopsys collaborated closely in developing this enablement to ensure that the tools meet the challenging tri-gate requirements and accurately model the complexities involved. Tool certification is complete, and Synopsys-based SoC design flow and silicon-proven Synopsys DesignWare® IP are available.

Synopsys and Intel Custom Foundry have also jointly delivered a certified solution for Intel Custom Foundry’s most advanced 10-nm process technology that offers superior PPA (Power, Performance and Area). Mutual customers of Synopsys and Intel Custom Foundry now have access to the 10-nm system-on-chip (SoC) design methodology based on Synopsys Design Platform, anchored by IC Compiler™ II.

Optimized Memory Compilers and Silicon-Proven IP

Synopsys and Intel work together to deliver silicon-proven advanced IP, including DesignWare Memory Compilers, DDR4/3 and DDR3/2 PHYs, optimized for Intel's unique tri-gate process.


"Intel Custom Foundry has been collaborating with Synopsys on multiple generations of products using Intel's tri-gate process technology," said Dr. Changhong Dai, vice president, Technology and Manufacturing Group, and director, Technology Optimization Solutions at Intel. "We build on this history with today's announcement for the early adopters of our 10-nm process—the third-generation tri-gate technology that offers superior PPA (Power, Performance and Area). Certification of the Synopsys Galaxy Design Platform allows our mutual customers to implement, verify, and signoff differentiated, leading-edge SoC designs." 

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